x88c64 slic ? e 2 1 ? xicor, inc. 1993, 1995, 1996 patents pending characteristics subject to change without notice 6540-1.5 7/9/96 t0/c1/d0 ns e 2 micro-peripheral 64k x88c64 slic ? e 2 8192 x 8 bit 80c51 microcontroller family compatible slic ? e 2 and concurrent read write ? are trademarks of xicor, inc. description the x88c64 slic e 2 is a highly integrated e 2 micro- controller peripheral which combines the functional- ity of the x88c64 component with pre-loaded soft- ware routines allowing any embedded system using it to upgrade and download software via the serial port. this self-loading integrated code eliminates the need to initially program the firmware into a memory device at the time of initial manufacture. the slic routines also greatly facilitate the loading of subse- quent versions of the firmware into the system. the slic routines consist of approximately 500 bytes of instructions for the 8051 which will initialize the microcontroller and its on-board uart and download the users software through the uart. the baud rate for the transfer is 9600 based on a crystal frequency of 11mhz. data transfer is accomplished using a proprietary format called xcom. xicor also has de- veloped a program for ibm pcs and compatibles called xslic, which will translate an intel hex format file into xcom format and upload the program to an x88c64 slic e 2 . the x88c64 device itself is an 8k x 8 e 2 prom fabricated with advanced cmos textured poly float- features slic (self loading integrated code) firmware ? automatically downloads users software into 8051 based systems ? features load, verify, and block protection capabilities ? transfers baud rate 9600 at 11mhz ? concurrent read write ? dual plane architecture isolates read/write functions between planes allows continuous execution of code from one plane while writing in the other plane ? multiplexed address/data bus direct interface to popular 8051 family ? block protect register individually set write lock out in 1k blocks ? toggle bit polling early end of write detection ? page mode write allows up to 32 bytes to be written in one write cycle a pplication n otes and d evelopment s ystem available an62C64 ? an66 ? an68 ? xk88 typical application 7 8 9 10 11 13 14 15 21 20 17 19 2 5 6 22 18 23 16 a/d0 a/d1 a/d2 a/d3 a/d4 a/d5 a/d6 a/d7 a8 a9 a10 a11 a12 wc psen ale rd wr ce v cc 24 target system x88c64 slic e 2 39 38 37 36 35 34 33 32 21 22 23 24 25 29 30 17 16 p0.0 p0.1 p0.2 p0.3 p0.4 p0.5 p0.6 p0.7 p2.0 p2.1 p2.2 p2.3 p2.4 psen ale rd wr p2.7 80c51 ? family ea/vp x1 x2 p3.0 p3.1 31 19 18 rs232 drivers ibm pc or compatible 6540 ill f01.1
x88c64 slic ? e 2 2 ing gate technology. the x88c64 features a multi- plexed address and data bus allowing direct inter- face to a variety of popular single-chip microcontrollers operating in expanded multiplexed mode without the need for additional interface circuitry. the x88c64 is internally configured as two indepen- dent 4k x 8 memory arrays. this feature provides the ability to perform nonvolatile memory updates in one array and continue operation out of code stored in the other array; effectively eliminating the need for an auxiliary memory device for code storage. to write to the x88c64 slic e 2 , a three-byte com- mand sequence must precede the byte(s) being writ- ten. this sequence called software data protection prevents the loss of data or program information due to inadvertant write cycles during power-up or power- down. the x88c64 slic e 2 also provides a second generation software data protection scheme called block protect. block protect can provide write lockout of the entire device or selected 1k blocks. there are eight 1k x 8 blocks that can be write protected individually in any combination required by the user. block protect, in additional to write control input, allows the different segments of the memory to have varying degrees of alterability in normal system operation. for further information on the x88c64 hardware interface, consult the x88c64 data sheet. pin names symbol description ale address latch enable a/d 0 Ca/d 7 address inputs/data i/o a 8 Ca 12 address inputs rd read input wr write input psen program store enable input ce chip enable wc write control v ss ground v cc supply voltage 6540 pgm t01 pin configuration dip/soic 6540 fhd f02 nc a12 nc nc wc psen a/d0 a/d1 a/d2 a/d3 a/d4 v ss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v cc wr ale a8 a9 a11 rd a10 ce a/d7 a/d6 a/d5 x88c64
x88c64 slic ? e 2 3 ordering information device temperature range blank = commercial = 0 c to +70 c i = industrial = C40 c to +85 c m = military = C55 c to +125 c package p = 24-lead plastic dip s = 24-lead soic limited warranty devices sold by xicor, inc. are covered by the warranty and patent indemnification provisions appearing in its terms of sale on ly. xicor, inc. makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. xicor, inc. makes no warranty of merchantability or fitness for any purpose. xicor, inc. rese rves the right to discontinue production and change specifications and prices at any time and without notice. xicor, inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a xicor, inc. product. no o ther circuits, patents, licenses are implied. us. patents xicor products are covered by one or more of the following u.s. patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481; 4,404,475; 4,450,402; 4,486,769; 4,488,060; 4,520,461; 4,533,846; 4,599,706; 4,617,652; 4,668,932; 4,752,912; 4,829,482; 4,874, 967; 4,883,976; 4,980,859; 5,012,132; 5,003,197; 5,023,694. foreign patents and additional patents pending. life related policy in situations where semiconductor component failure may endanger life, system designers using this product should design the sy stem with appropriate error detection and correction, redundancy and back-up features to prevent such an occurrence. xicors products are not authorized for use as critical components in life support devices or systems. 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) sup port or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reaso nably expected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. slic x88c64 x x
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